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Writer's pictureDR.GEEK

Low latency mining

( 27th October 2019 )

There are so many algorithms of cryptocurrency mining in today. But some of them are ASIC resistance model including memory access in the process. We developed Level three cache for BL to enhance the mining hash rate on RIGs.

Cache technology

In computing, cache algorithms (also frequently called cache replacement algorithms or cache replacement policies) are optimizing instructions, or algorithms, that a computer program or a hardware-maintained structure can utilize in order to manage a cache of information stored on the computer. Caching improves performance by keeping recent or often-used data items in a memory location that are faster or computationally cheaper to access than normal memory stores. When the cache is full, the algorithm must choose which items to discard to make room for the new ones.

L3 cache hash searching method

Here is the simple code of L3 cache data address hash searching algorithm:

IRP Offset =0;

IRP length = 2048;

NrBlocks = ((offset + NrSectors - 1)>> *(targetDisk->SectorPerBlock2)) +1;

NrBlocks = ((0 + 4 - 1)>> 3) +1;

Index = (ULONG) ((blockSector.QuadPart) % (targetDisk->NrBlocks));

Index = 1 % 100 = 1;

RowIndex = (Index / (targetDisk->index Columns));

ColumnIndex = 0%32= 0;

Block = _SearchBlock (targetDisk, blockSector, RowIndex, Column Index);

Block = _SearchBlock (targetDisk, 0, 0, 0);

Block of data be searched in the list attached on this index that whether it exists on L3 cache or not. It is weak for a small set of data but Hashing technique is useful for large size data.


Fig-1: L3 Cache hash table (Jumping Algorithm)

The design balanced computing system architecture through multi-layer cache, with ample overall cache storage space is our proposal. In the broader context of ADMLC system cache, every low level device is cache for higher-level device, and higher-level cache is mounted on low level device. The cache at level “i” enhances the performance of the computing system that can be calculated according to Amdahl’s law as follows:


In computer architecture, Amdahl's law (or Amdahl's argument) is a formula which gives the theoretical speedup in latency of the execution of a task at fixed workload that can be expected of a system whose resources are improved. It is named after computer scientist Gene Amdahl, and was presented at the AFIPS Spring Joint Computer Conference in 1967.

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